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https://github.com/NotAShelf/microfetch.git
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arch: add mips32 support
This commit is contained in:
parent
205e637d89
commit
277eec55b0
4 changed files with 258 additions and 10 deletions
7
.github/workflows/rust.yml
vendored
7
.github/workflows/rust.yml
vendored
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@ -52,6 +52,11 @@ jobs:
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# powerpc uses experimental asm features
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- target: powerpc-unknown-linux-gnu
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toolchain: nightly
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# mips is tier-3 and uses experimental asm features
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- target: mips-unknown-linux-gnu
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toolchain: nightly
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components: rust-src
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build_std: true
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steps:
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- name: "Checkout"
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@ -77,7 +82,7 @@ jobs:
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target: ${{ matrix.target }}
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- name: "Build"
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run: cargo build --verbose --target ${{ matrix.target }} ${{ matrix.build_std && '-Z build-std=core,alloc,panic_abort' || '' }}
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run: cargo build --verbose --target ${{ matrix.target }} ${{ matrix.build_std && '-Z build-std=core,alloc,panic_abort' || '' }} ${{ matrix.extra_args || '' }}
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# tier-3 targets have no prebuilt std and tests are arch-agnostic, so
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# run them against the host toolchain instead of the cross target.
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@ -7,7 +7,7 @@
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//!
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//! Supports `x86_64`, `aarch64`, `riscv64`, `loongarch64`, `s390x`,
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//! `powerpc64`, `arm` (armv7), `riscv32`, `sparc64`, `mips64`, `x86` (i686),
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//! `powerpc` (ppc32), and `sparc` (sparc32) architectures.
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//! `powerpc` (ppc32), `sparc` (sparc32), and `mips` (O32) architectures.
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#![no_std]
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#![cfg_attr(
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@ -16,7 +16,8 @@
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target_arch = "powerpc",
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target_arch = "sparc64",
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target_arch = "sparc",
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target_arch = "mips64"
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target_arch = "mips64",
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target_arch = "mips"
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),
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feature(asm_experimental_arch)
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)]
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@ -35,12 +36,13 @@
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target_arch = "mips64",
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target_arch = "x86",
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target_arch = "powerpc",
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target_arch = "sparc"
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target_arch = "sparc",
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target_arch = "mips"
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)))]
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compile_error!(
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"Unsupported architecture: only x86_64, aarch64, riscv64, loongarch64, \
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s390x, powerpc64, arm, riscv32, sparc64, mips64, x86, powerpc, and sparc \
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are supported"
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s390x, powerpc64, arm, riscv32, sparc64, mips64, x86, powerpc, sparc, and \
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mips are supported"
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);
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// Per-arch syscall implementations live in their own module files.
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@ -83,6 +85,9 @@ mod arch;
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#[cfg(target_arch = "sparc")]
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#[path = "sparc.rs"]
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mod arch;
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#[cfg(target_arch = "mips")]
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#[path = "mips.rs"]
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mod arch;
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/// Copies `n` bytes from `src` to `dest`.
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///
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@ -323,7 +328,8 @@ pub unsafe fn sys_uname(buf: *mut UtsNameBuf) -> i32 {
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target_arch = "x86",
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target_arch = "powerpc",
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target_arch = "sparc",
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target_arch = "mips64"
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target_arch = "mips64",
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target_arch = "mips"
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)))]
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pub struct StatfsBuf {
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pub f_type: i64,
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@ -389,6 +395,28 @@ pub struct StatfsBuf {
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pub _pad: [u32; 4],
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}
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/// mips (O32) uses `compat_statfs64`, same reordering with 32-bit words; see
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/// https://github.com/torvalds/linux/blob/v6.19/arch/mips/include/uapi/asm/statfs.h
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#[repr(C)]
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#[cfg(target_arch = "mips")]
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pub struct StatfsBuf {
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pub f_type: u32,
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pub f_bsize: u32,
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pub f_frsize: u32,
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_pad: u32,
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pub f_blocks: u64,
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pub f_bfree: u64,
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pub f_files: u64,
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pub f_ffree: u64,
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pub f_bavail: u64,
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pub f_fsid: [i32; 2],
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pub f_namelen: u32,
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pub f_flags: u32,
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#[allow(clippy::pub_underscore_fields, reason = "This is not a public API")]
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pub _pad2: [u32; 5],
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}
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/// mips reorders fields; see
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/// https://github.com/torvalds/linux/blob/v6.19/arch/mips/include/uapi/asm/statfs.h
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#[repr(C)]
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@ -484,7 +512,8 @@ pub fn read_file_fast(path: &str, buffer: &mut [u8]) -> Result<usize, i32> {
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target_arch = "riscv32",
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target_arch = "x86",
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target_arch = "powerpc",
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target_arch = "sparc"
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target_arch = "sparc",
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target_arch = "mips"
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)))]
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pub struct SysInfo {
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pub uptime: i64,
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@ -514,7 +543,8 @@ pub struct SysInfo {
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target_arch = "riscv32",
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target_arch = "x86",
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target_arch = "powerpc",
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target_arch = "sparc"
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target_arch = "sparc",
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target_arch = "mips"
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))]
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pub struct SysInfo {
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pub uptime: i32,
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196
crates/asm/src/mips.rs
Normal file
196
crates/asm/src/mips.rs
Normal file
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@ -0,0 +1,196 @@
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//! Syscall implementations for `mips`.
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use super::{StatfsBuf, SysInfo, UtsNameBuf};
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pub(super) unsafe fn sys_open(path: *const u8, flags: i32) -> i32 {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 5 => ret, // SYS_open
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in("$4") path,
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in("$5") flags,
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in("$6") 0i32, // mode
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret
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}
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}
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pub(super) unsafe fn sys_read(fd: i32, buf: *mut u8, count: usize) -> isize {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 3 => ret, // SYS_read
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in("$4") fd,
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in("$5") buf,
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in("$6") count,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret as isize
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}
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}
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pub(super) unsafe fn sys_write(fd: i32, buf: *const u8, count: usize) -> isize {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 4 => ret, // SYS_write
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in("$4") fd,
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in("$5") buf,
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in("$6") count,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret as isize
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}
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}
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pub(super) unsafe fn sys_close(fd: i32) -> i32 {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 6 => ret, // SYS_close
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in("$4") fd,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret
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}
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}
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pub(super) unsafe fn sys_uname(buf: *mut UtsNameBuf) -> i32 {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 122 => ret, // SYS_newuname
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in("$4") buf,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret
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}
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}
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pub(super) unsafe fn sys_statfs(path: *const u8, buf: *mut StatfsBuf) -> i32 {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 255 => ret, // SYS_statfs64
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in("$4") path,
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in("$5") core::mem::size_of::<StatfsBuf>(),
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in("$6") buf,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret
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}
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}
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pub(super) unsafe fn sys_sysinfo(info: *mut SysInfo) -> i64 {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000_i32 + 116 => ret, // __NR_sysinfo
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in("$4") info,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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i64::from(ret)
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}
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}
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pub(super) unsafe fn sys_sched_getaffinity(
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pid: i32,
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mask_size: usize,
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mask: *mut u8,
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) -> i32 {
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unsafe {
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let ret: i32;
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core::arch::asm!(
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"syscall",
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"beqz $7, 1f",
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"nop",
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"subu $2, $0, $2",
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"1:",
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inlateout("$2") 4000i32 + 240 => ret, // __NR_sched_getaffinity
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in("$4") pid,
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in("$5") mask_size,
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in("$6") mask,
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lateout("$7") _,
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lateout("$8") _, lateout("$9") _, lateout("$10") _, lateout("$11") _,
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lateout("$12") _, lateout("$13") _, lateout("$14") _, lateout("$15") _,
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lateout("$24") _, lateout("$25") _,
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options(nostack)
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);
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ret
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}
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}
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pub(super) unsafe fn sys_exit(code: i32) -> ! {
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unsafe {
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core::arch::asm!(
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"syscall",
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in("$2") 4000i32 + 1, // SYS_exit
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in("$4") code,
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options(noreturn, nostack)
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);
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}
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}
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@ -6,7 +6,8 @@
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target_arch = "powerpc",
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target_arch = "sparc64",
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target_arch = "sparc",
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target_arch = "mips64"
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target_arch = "mips64",
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target_arch = "mips"
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),
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feature(asm_experimental_arch)
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)]
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@ -280,6 +281,22 @@ extern "C" fn __atomic_store_1(ptr: *mut u8, val: u8, _order: i32) {
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unsafe { core::ptr::write_volatile(ptr, val) }
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}
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#[cfg(target_arch = "mips")]
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#[unsafe(no_mangle)]
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#[unsafe(naked)]
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unsafe extern "C" fn _start() {
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naked_asm!(
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"move $a0, $sp", // first arg = original sp (argc/argv)
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"addiu $sp, $sp, -24", // reserve 16-byte O32 shadow space + align
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"jal {entry_rust}",
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"nop", // delay slot
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"move $a0, $v0", // exit code = entry_rust return value
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"li $v0, 4001", // SYS_exit (4000 + 1)
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"syscall",
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entry_rust = sym entry_rust,
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);
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}
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// Global allocator
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#[global_allocator]
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static ALLOCATOR: BumpAllocator = BumpAllocator::new();
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