dev: hardware init code added. starting to write Board methods

This commit is contained in:
A.M. Rowsell 2025-08-02 13:32:16 -04:00
commit d6eb6b69c2
Signed by untrusted user who does not match committer: amr
GPG key ID: E0879EDBDB0CA7B1
4 changed files with 135 additions and 34 deletions

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@ -8,15 +8,25 @@
#include "Board.hpp" #include "Board.hpp"
Board::Board() { Board::Board() {
// set up the board grid with smart pointers
// initialize each square with a Piece, set to PIECE_EMPTY
boardGrid.resize(8);
for(int i = 0; i < 8; i++) {
boardGrid[i].resize(8);
for(int j = 0; j < 8; j++) {
boardGrid[i][j] = std::make_unique<Piece>(PIECE_EMPTY);
}
}
} }
Board::~Board() { Board::~Board() {
} }
void Board::setupInitialPosition() { void Board::setupInitialPosition() {
return; return;
} }
void Board::movePiece(int fromX, int fromY, int toX, int toY) { void Board::movePiece(Square from, Square to) {
return; return;
} }

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@ -9,19 +9,25 @@
#define BOARD_HPP #define BOARD_HPP
#include <vector> #include <vector>
#include <memory>
#include <cstdint> #include <cstdint>
#include "Piece.hpp" #include "Piece.hpp"
// why do I have to forward declare all these?!
class Piece; class Piece;
enum Players { PL_WHITE, PL_BLACK };
struct Square;
class Board { class Board {
private: private:
std::vector<std::vector<Piece *>> boardGrid; std::vector<std::vector<std::unique_ptr<Piece>>> boardGrid;
public: public:
Board(); Board();
~Board(); ~Board();
void setupInitialPosition(); void setupInitialPosition();
Piece *getPieceAt(int x, int y) const; Piece *getPieceAt(int x, int y) const;
void movePiece(int fromX, int fromY, int toX, int toY); void movePiece(Square from, Square to);
bool isInBounds(int x, int y) const; bool isInBounds(int x, int y) const;
uint64_t serialBoard = 0xFFFF00000000FFFF; // opening position uint64_t serialBoard = 0xFFFF00000000FFFF; // opening position
void deserializeBoard(uint64_t incomingBoard); void deserializeBoard(uint64_t incomingBoard);

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@ -11,6 +11,7 @@
#include <stdint.h> #include <stdint.h>
#include <utility> #include <utility>
#include <memory>
#include <vector> #include <vector>
#include "Board.hpp" #include "Board.hpp"
class Board; class Board;

146
main.cpp
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@ -19,10 +19,10 @@
// DEVCFG2 // DEVCFG2
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider) #pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider)
#pragma config FPLLMUL = MUL_24 // PLL Multiplier (24x Multiplier) #pragma config FPLLMUL = MUL_24 // PLL Multiplier (24x Multiplier) 96MHz
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider (2x Divider) #pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider (2x Divider) 48MHz
#pragma config UPLLEN = ON // USB PLL Enable (Enabled) #pragma config UPLLEN = ON // USB PLL Enable (Enabled)
#pragma config FPLLODIV = DIV_8 // System PLL Output Clock Divider (PLL Divide by 8) #pragma config FPLLODIV = DIV_8 // System PLL Output Clock Divider (PLL Divide by 8) 12MHz
// DEVCFG1 // DEVCFG1
#pragma config FNOSC = FRCPLL // Oscillator Selection Bits (Fast RC Osc with PLL) #pragma config FNOSC = FRCPLL // Oscillator Selection Bits (Fast RC Osc with PLL)
@ -47,6 +47,18 @@
// #pragma config statements should precede project file includes. // #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF. // Use project enums instead of #define for ON and OFF.
#include <xc.h> #include <xc.h>
#include <sys/attribs.h> // for ISR macros
#include <sys/kmem.h>
#include "Board.hpp"
#include "Piece.hpp"
#include "NeoPixel.hpp"
#define F_CPU 12000000UL // 12MHz
#define F_PER 6000000UL // 6MHz
#define SPI_BAUD 1000000 // 1MHz hopefully
volatile uint8_t spi_rx_buffer[8];
void sendChar(uint8_t c) { void sendChar(uint8_t c) {
U1TXREG = c; U1TXREG = c;
@ -63,7 +75,28 @@ uint8_t appInfo(uint8_t *msg, uint16_t len) {
return 0; return 0;
} }
/*
* Pin mapping:
*
* UART: (for debug)
* U1TX = RC0/pin 25
*
* SPI: (to 74HC165)
* Shift/Load = RA0
* Shift Clock SCK1 = RB14/pin 14
* Data out SDI1 = RC8/pin 4
*
*
* USB:
* RB10: D+
* RB11: D-
*
*
*/
#define SL_TRIS TRISAbits.TRISA0
#define SL_LAT LATAbits.LATA0
uint8_t initSystem(void) { uint8_t initSystem(void) {
/* set up GPIO */ /* set up GPIO */
SYSKEY = 0x0; SYSKEY = 0x0;
SYSKEY = 0xAA996655; SYSKEY = 0xAA996655;
@ -71,48 +104,99 @@ uint8_t initSystem(void) {
CFGCON &= ~(1<<13); // unlock PPS CFGCON &= ~(1<<13); // unlock PPS
SDI1R = 0b0110; // RC8 SDI1R = 0b0110; // RC8
SDI2R = 0b0100; // RB2
SS2R = 0b0111; // RC4
RPB5R = 0b0011; // SD01
RPC0R = 0b0001; // U1TX RPC0R = 0b0001; // U1TX
SYSKEY = 0x12345678; // lock SYSKEY SYSKEY = 0x12345678; // lock SYSKEY
ANSELACLR = 0xFFFF; // port A all digital
SL_TRIS = 0; // RA0 as output
SL_LAT = 1; // set high
/* Set up SPI1 */ /* Set up SPI1 */
SPI1BRG = 1; // 1.5MHz SPI1CON = 0; // reset SPI config
SPI1CONbits.ENHBUF = 1; // enable enhanced buffer SPI1BRG = (F_PER / (2 * SPI_BAUD)) - 1; // calculate for 1MHz
SPI1CONbits.MSTEN = 1; // master mode SPI1STATCLR = _SPI1STAT_SPIROV_MASK; // Clear overflow
SPI1CONbits.STXISEL = 0b10; // interrupt on half-empty or more SPI1CONbits.MSTEN = 1; // Enable Master mode
SPI1CONbits.CKP = 0; // Clock idle low
SPI1CONbits.CKE = 1; // Transmit on falling edge
SPI1CONbits.SMP = 1; // Input sampled at end
SPI1CONbits.ON = 1; // Enable SPI
/* set up UART */ /* set up UART */
U1BRG = 38; // 9600 baud U1BRG = 19; // 9600 baud (was 38 @ 24MHz)
U1STAbits.UTXEN = 1; // enable transmitter U1STAbits.UTXEN = 1; // enable transmitter
U1MODEbits.ON = 1; // enable UART U1MODEbits.ON = 1; // enable UART
/* set up DMA */ /* set up DMA */
// clear all 4 DMA channel flags & IE // clear all 4 DMA channel flags & IE
// IEC1CLR = 0xF0000000; IEC1CLR = 0xF0000000;
// IFS1CLR = 0xF0000000; IFS1CLR = 0xF0000000;
//
// DMACONbits.ON = 1; //enable DMA controller DMACONbits.ON = 1; //enable DMA controller
//
// // Channel 0: SPI2 receive triggers DMA to buffer // === DMA Channel 1 Init (RX from SPI1BUF to spi_rx_buffer[]) ===
// DCH0ECONbits.CHSIRQ = 51; // SPI2 receive complete DCH0CON = 0; // Reset channel config
// DCH0ECONbits.SIRQEN = 1; // enable trigger DCH0ECON = 0;
// DCH0CONbits.CHCHN = 1; // enable chaining
// DCH0CONbits.CHAEN = 1; // auto enable DCH0SSA = KVA_TO_PA(&SPI1BUF); // Source: SPI1BUF
// DCH0SSA = KVA_TO_PA(&SPI2BUF); // source is SPI2BUF DCH0DSA = KVA_TO_PA(spi_rx_buffer); // Destination: receive buffer
// DCH0DSA = KVA_TO_PA(dmaBuffer); DCH0SSIZ = 1; // Source size = 1 byte
// DCH0SSIZ = 1; DCH0DSIZ = sizeof(spi_rx_buffer); // Destination size = 8 bytes
// DCH0DSIZ = 16; DCH0CSIZ = 1; // Cell transfer size = 1 byte
// DCH0CSIZ = 16; // copy 1 sets of 2 bytes from source to destination
// DCH0ECONbits.CHSIRQ = _SPI1_VECTOR; // Trigger on SPI1 receive
// IEC1SET = 0x10000000; // channel 0 interrupt enable DCH0ECONbits.SIRQEN = 1; // Enable IRQ trigger
// DCH0CONbits.CHEN = 1; // enable channel
DCH0INTCLR = 0x00FF00FF; // Clear all interrupt flags
DCH0INTbits.CHBCIE = 1; // Enable block complete interrupt
DCH0CONbits.CHPRI = 2; // Priority 2 (TX is higher)
DCH0CONbits.CHAEN = 1; // Auto-enable on trigger
DCH0CONbits.CHEN = 1; // Enable channel
return 0; return 0;
} }
extern "C" int main(void) {
void initInterrupts(void) {
INTCONbits.MVEC = 1; // Enable multi-vector interrupts
__builtin_enable_interrupts();
IPC10bits.DMA0IP = 3; // Priority level 3
IFS1CLR = _IFS1_DMA0IF_MASK; // Clear interrupt flag
IEC1SET = _IEC1_DMA0IE_MASK; // Enable DMA1 interrupt
}
void startSPI_DMA_Transfer(void) {
// Pulse PL low to latch inputs from 74HC165
SL_LAT = 0;
asm volatile("nop; nop; nop;"); // small delay
SL_LAT = 1;
DCH0CONbits.CHEN = 1;
for (int i = 0; i < 8; i++) {
while (SPI1STATbits.SPITBF); // Wait if TX buffer full
SPI1BUF = 0x00; // Send dummy byte to clock in data
}
return;
}
extern "C" int main(void) {
initSystem();
initInterrupts();
Board gameBoard;
NeoPixel boardLights(64);
while(1) { while(1) {
} }
} }
// === Interrupt Service Routine for DMA0 (RX complete) ===
extern "C" void __ISR(_DMA0_VECTOR, IPL3SOFT) DMA0Handler(void) {
__builtin_disable_interrupts(); // stop additional ints from firing
if (DCH0INTbits.CHBCIF) {
DCH0INTCLR = _DCH0INT_CHBCIF_MASK; // Clear block complete flag
// DMA RX completed — spi_rx_buffer[] now contains the data
}
IFS1CLR = _IFS1_DMA0IF_MASK; // Clear global DMA0 IRQ flag
}