dev: Pile of updates and formatting fixes.
This commit is contained in:
A.M. Rowsell
parent
47043a7869
commit
68ed9ce922
GPG key ID:
E0879EDBDB0CA7B1
9 changed files with 182 additions and 166 deletions
80
main.cpp
80
main.cpp
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@ -1,11 +1,11 @@
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// FrznChess MCU code
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// © 2025 A.M. Rowsell <amr@frzn.dev>
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// This Source Code Form is subject to the terms of the Mozilla Public
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// License, v. 2.0. If a copy of the MPL was not distributed with this
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// file, You can obtain one at http://mozilla.org/MPL/2.0/.
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// This Source Code Form is "Incompatible With Secondary Licenses", as
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// defined by the Mozilla Public License, v. 2.0.
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// This Source Code Form is subject to the terms of the Mozilla Public
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// License, v. 2.0. If a copy of the MPL was not distributed with this
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// file, You can obtain one at http://mozilla.org/MPL/2.0/.
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// This Source Code Form is "Incompatible With Secondary Licenses", as
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// defined by the Mozilla Public License, v. 2.0.
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// PIC32MX270F256B Configuration Bit Settings
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// 'C' source line config statements
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@ -69,7 +69,7 @@ extern "C" int open(const char *buf, int flags, int mode) {
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void sendChar(uint8_t c) {
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U1TXREG = c;
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while (!U1STAbits.TRMT); // wait for transmission
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while(!U1STAbits.TRMT); // wait for transmission
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return;
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}
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@ -78,7 +78,7 @@ uint8_t appInfo(uint8_t *msg, uint16_t len) {
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do {
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sendChar(*(msg + offset));
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offset++;
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} while (--len);
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} while(--len);
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return 0;
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}
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@ -86,13 +86,15 @@ uint8_t appInfo(uint8_t *msg, uint16_t len) {
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* Pin mapping:
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*
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* UART: (for debug)
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* U1TX = RC0/pin 25
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* U1TX = RA0
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*
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* SPI: (to 74HC165)
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* Shift/Load = RA0
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* Shift Clock SCK1 = RB14/pin 14
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* Data out SDI1 = RC8/pin 4
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* Shift/Load = RB9
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* Shift Clock SCK1 = RB14
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* Data In SDI1 = RB8
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*
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* NeoPixel:
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* Pixel Data: RA4
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*
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* USB:
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* RB10: D+
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@ -100,26 +102,21 @@ uint8_t appInfo(uint8_t *msg, uint16_t len) {
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*
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*
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*/
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#define SL_TRIS TRISAbits.TRISA0
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#define SL_LAT LATAbits.LATA0
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#define SL_TRIS TRISBbits.TRISB9
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#define SL_LAT LATBbits.LATB9
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uint8_t initSystem(void) {
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/* set up GPIO */
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SYSKEY = 0x0;
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SYSKEY = 0xAA996655;
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SYSKEY = 0x556699AA;
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CFGCON &= ~(1 << 13); // unlock PPS
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SDI1R = 0b0110; // RC8
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RPC0R = 0b0001; // U1TX
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SDI1R = 0b0100; // RB8
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RPA0R = 0b0001; // U1TX
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SYSKEY = 0x12345678; // lock SYSKEY
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ANSELACLR = 0xFFFF; // port A all digital
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ANSELBCLR = 0xFFFF; // port A all digital
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SL_TRIS = 0; // RA0 as output
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SL_LAT = 1; // set high
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/* Set up SPI1 */
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SPI1CON = 0; // reset SPI config
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SPI1BRG = (F_PER / (2 * SPI_BAUD)) - 1; // calculate for 1MHz
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@ -129,35 +126,27 @@ uint8_t initSystem(void) {
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SPI1CONbits.CKE = 1; // Transmit on falling edge
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SPI1CONbits.SMP = 1; // Input sampled at end
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SPI1CONbits.ON = 1; // Enable SPI
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/* set up UART */
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U1BRG = 9; // 9600 baud (was 38 @ 24MHz)
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U1STAbits.UTXEN = 1; // enable transmitter
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U1MODEbits.ON = 1; // enable UART
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/* set up DMA */
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// clear all 4 DMA channel flags & IE
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IEC1CLR = 0xF0000000;
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IFS1CLR = 0xF0000000;
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DMACONbits.ON = 1; //enable DMA controller
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// === DMA Channel 1 Init (RX from SPI1BUF to spi_rx_buffer[]) ===
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DCH0CON = 0; // Reset channel config
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DCH0ECON = 0;
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DCH0SSA = KVA_TO_PA(&SPI1BUF); // Source: SPI1BUF
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DCH0DSA = KVA_TO_PA(spi_rx_buffer); // Destination: receive buffer
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DCH0SSIZ = 1; // Source size = 1 byte
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DCH0DSIZ = sizeof (spi_rx_buffer); // Destination size = 8 bytes
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DCH0DSIZ = sizeof(spi_rx_buffer); // Destination size = 8 bytes
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DCH0CSIZ = 1; // Cell transfer size = 1 byte
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DCH0ECONbits.CHSIRQ = _SPI1_VECTOR; // Trigger on SPI1 receive
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DCH0ECONbits.SIRQEN = 1; // Enable IRQ trigger
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DCH0INTCLR = 0x00FF00FF; // Clear all interrupt flags
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DCH0INTbits.CHBCIE = 1; // Enable block complete interrupt
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DCH0CONbits.CHPRI = 2; // Priority 2 (TX is higher)
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DCH0CONbits.CHAEN = 1; // Auto-enable on trigger
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DCH0CONbits.CHEN = 1; // Enable channel
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@ -167,7 +156,6 @@ uint8_t initSystem(void) {
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void initInterrupts(void) {
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INTCONbits.MVEC = 1; // Enable multi-vector interrupts
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__builtin_enable_interrupts();
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IPC10bits.DMA0IP = 3; // Priority level 3
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IFS1CLR = _IFS1_DMA0IF_MASK; // Clear interrupt flag
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IEC1SET = _IEC1_DMA0IE_MASK; // Enable DMA1 interrupt
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@ -178,10 +166,9 @@ void startSPI_DMA_Transfer(void) {
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SL_LAT = 0;
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asm volatile("nop; nop; nop;"); // small delay
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SL_LAT = 1;
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DCH0CONbits.CHEN = 1;
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for (int i = 0; i < 8; i++) {
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while (SPI1STATbits.SPITBF); // Wait if TX buffer full
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for(int i = 0; i < 8; i++) {
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while(SPI1STATbits.SPITBF); // Wait if TX buffer full
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SPI1BUF = 0x00; // Send dummy byte to clock in data
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}
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return;
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@ -192,9 +179,7 @@ extern "C" int main(void) {
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initInterrupts();
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Board gameBoard;
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NeoPixel boardLights(64);
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while (1) {
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while(1) {
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}
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}
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@ -202,20 +187,19 @@ extern "C" int main(void) {
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extern "C" void __ISR(_DMA0_VECTOR, IPL3AUTO) DMA0Handler(void) {
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__builtin_disable_interrupts(); // stop additional ints from firing
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if (DCH0INTbits.CHBCIF) {
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if(DCH0INTbits.CHBCIF) {
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DCH0INTCLR = _DCH0INT_CHBCIF_MASK; // Clear block complete flag
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// DMA RX completed — spi_rx_buffer[] now contains the data
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}
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IFS1CLR = _IFS1_DMA0IF_MASK; // Clear global DMA0 IRQ flag
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}
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extern "C" void __ISR(_USB1_VECTOR, IPL4AUTO) USBHandler(void) {
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if (USBE2CSR1bits.RXPKTRDY) {
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int count = USB_receive_EP2();
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// Echo back
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USB_send_EP2(EP[2].rx_buffer, count);
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USBCSR1bits.EP2RXIF = 0;
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}
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IFS1bits.USBIF = 0; // clear USB interrupt flag
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}
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//extern "C" void __ISR(_USB1_VECTOR, IPL4AUTO) USBHandler(void) {
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// if (USBE2CSR1bits.RXPKTRDY) {
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// int count = USB_receive_EP2();
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// // Echo back
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// USB_send_EP2(EP[2].rx_buffer, count);
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// USBCSR1bits.EP2RXIF = 0;
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// }
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// IFS1bits.USBIF = 0; // clear USB interrupt flag
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//}
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